1. Field of the Invention
The present invention relates to optical logic gates, optical communication devices and systems, and optical computing devices and systems, and optical sensors. More particularly, the present invention relates to a cascadable all-optical, reconfigurable, universal logic gate device and method to perform all-optical or hybrid electro-optical digital logic operations.
2. Description of Related Art
Efficient, high-speed, single transverse mode, all-optical gates with positive inverter gain and a reasonably large contrast ratio are needed for on-chip digital photonic logic circuits. Positive inverter gain, a.k.a. high fanout, is the ability to shut off a strong optical signal using a weaker input signal. It is needed in order to cascade logic gates without introducing external amplifiers. Contrast is the ratio of the output power when the digital output represents 1 to when it represents 0. It is a key factor in determining signal noise margins and strongly affects bit error rates.
Various approaches and strategies for such high-speed optical gates have included using: (1) a pre-amplifier to boost the weaker input signal, (2) the gain lever effect to enhance gain quenching, (3) a saturable absorber to accelerate gain quenching, and (4) carrier induced non-linear effects. Each on-chip approach or combination of approaches to date has significant performance tradeoffs among efficiency, speed, single mode operation, inverter gain, and contrast ratio. These tradeoffs are unavoidable in devices that use optical gain quenching or optical bistability because when the laser is quenched below threshold, it takes an incredibly long time to turn back on. This time constant is related to the carrier lifetime, and thus limits the operational speeds for such devices. Partial quenching solutions may increase the speed but at the expense of signal contrast. Another fundamental problem is that the device speed increases with bias, whereas gain quenching is optimal just above transparency (Ncideal≈e·Ntr, where e=2.718) due to the competing effects of increasing stimulated emission and decreasing differential gain with bias. Gain quenched devices tend to have their highest inverter gain just above threshold, which is where they are slowest.
Accordingly, a need exists for an efficient, high-speed, single transverse mode, all-optical, on-chip device with positive inverter gain and a substantially large contrast ratio that can perform unary operations (NOT or COPY), and/or one of the 6 binary operations (OR, XOR, AND, NOR, XNOR, or NAND), and/or one of the many operations involving more than two inputs. The present invention is directed to such a need.